This invention relates, in general, to complementary metal oxide semiconductor (CMOS) circuits and more particularly, to a CMOS circuit having high voltage capability.
A typical CMOS circuit will have an output voltage capability of approximately 30 volts, however many CMOS circuits have been known to break down at approximately 18 volts. Occasionally the situation arises where it would be desirable to operate CMOS circuits at voltages higher than the typical breakdown voltages. One application where such high voltage CMOS circuits would be desirable is for driving a multiplex vacuum fluorescent display. Generally speaking, the breakdown voltage of a CMOS circuit is a function of the resistivity of its P tub and also a function of the depth of the N type drain portion of the CMOS circuit. Accordingly, when it is desired to increase the breakdown voltage of the circuit the obvious approach is to vary the resistivity of the P tub or change the depth of the N type drain portion or to take both corrective steps. One of the disadvantages with most known ways of increasing the breakdown voltage of a CMOS circuit is that they involve process changes. Semiconductor processes are often considered to be more of an art than a science, and therefore, changes to the process are made reluctantly and only after much experimentation.
Accordingly, it is an object of the present invention to provide a CMOS circuit having high voltage capability which does not require changes to the process.
Another object of the present invention is to increase the breakdown voltage of a CMOS circuit by adding an additional series N channel transistor and connecting the P tubs in a unique manner.